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Spin Electronics: STT-MRAM

Here is our latest publication on spintronics:

[C25] D. Halupka*, S. Huda*, W. Song*, A. Sheikholeslami, K. Tsunoda, C. Yoshida, and M. Aoki,
Negative-Resistance Read and Write Schemes for STT-MRAM in 0.13um CMOS,
IEEE International Solid-State Circuits Conference (ISSCC), Digest of Tech. Papers, pp. 256-257, Feb. 2010.

For a complete list of publications, please refer to Publications and Patents.

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