VPR Architecture Files

"Should FPGAs Abandon the Pass-Gate?" Architecture Files

The following VPR architecture files all have an identical 22nm architecture which is described in detail in [1]. Briefly, N=10, K=6, W=320, Fcin = 0.2, Fcout = 0.025. See [1] for more details. They differ in terms of the type of switch used (pass-transistor or transmission gate) and in terms of supply voltage and SRAM voltage (i.e. gate boosting). Timing estimates for the logic and routing were obtained with an early version of COFFE. Note that the nominal VDD for this process is 0.8V.

Other Architecture Files

None right now.


  1. C. Chiasson and V.Betz, "Should FPGAs Abandon the Pass-Gate?", IEEE International Conference on Field-Programmable Logic and Applications (FPL), 2013, [PDF]