Jason H. Anderson
Dept. of Electrical and Computer Engineering
University of Toronto
Dept. of Electrical and Computer Engineering
University of Toronto
Recent News
December 2011: New release of LegUp -- our open source high-level synthesis tool. LegUp 2.0 incorporates many enhancements, including more sophisticated resource sharing and scheduling, as well as significant code re-factoring that will make it easier for researchers to modify and experiment with the tool.
December 2011: The 2012 International Symposium on Field-Programmable Custom Computing Machines (FCCM 2012) will be held at Toronto, Canada from April 29-May 1, 2012. Consider submiting a paper!
December 2011: Prof. Anderson is on the program committee for the 2012 Reconfigurable Architectures Workshop to be held at Shanghai, China. Please consider submitting a paper!
November 2011: Several papers accepted to upcoming conferences. Congrats to all of the students involved: Warren, Stefan, Andrew, James, Kevin, Zissis, Jason, Opal!!
Z. Poulous, T. Yang, J.H. Anderson, A. Veneris,
"Leveraging reconfigurability to raise productivity in FPGA functional debug,"
to appear in the IEEE Design Automation and Test of Europe (DATE) Conference,
to be held at Dresden, Germany, March 2012.
W. Shum, J.H. Anderson, "Analyzing and predicting the impact of CAD algorithm noise on FPGA speed performance and power," to appear in the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, to be held at Monterey, CA, February 2012.
S. Hadjis, A. Canis, J.H. Anderson, J. Choi, K. Nam, S. Brown. T. Czajkowski, "Impact of FPGA architecture on resource sharing in high-level synthesis," to appear in the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, to be held at Monterey, CA, February 2012.
J. Rose, J. Luu, K. Kent, C.-W. Yu, J.H. Anderson, O. Densmore, P. Jamieson, "The VTR project: architecture and CAD for FPGAs from Verilog to Routing," to appear in the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, to be held at Monterey, CA, February 2012.
W. Shum, J.H. Anderson, "Analyzing and predicting the impact of CAD algorithm noise on FPGA speed performance and power," to appear in the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, to be held at Monterey, CA, February 2012.
S. Hadjis, A. Canis, J.H. Anderson, J. Choi, K. Nam, S. Brown. T. Czajkowski, "Impact of FPGA architecture on resource sharing in high-level synthesis," to appear in the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, to be held at Monterey, CA, February 2012.
J. Rose, J. Luu, K. Kent, C.-W. Yu, J.H. Anderson, O. Densmore, P. Jamieson, "The VTR project: architecture and CAD for FPGAs from Verilog to Routing," to appear in the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, to be held at Monterey, CA, February 2012.
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Biography
Professor Jason H. Anderson received the Ph.D. degree in Electrical and Computer Engineering from the Department of Electrical and Computer Engineering (ECE), University of Toronto in 2005. He received the M.A.Sc. degree from the University of Toronto, and the B.Sc. degree in Computer Engineering from the University of Manitoba.
In August 2008, Dr. Anderson joined the University of Toronto faculty as an Assistant Professor of Electrical and Computer Engineering (ECE). He has received three ECE departmental teaching awards for excellence in undergraduate teaching (2009, 2010, 2011), and has also been nominated for the TVO Best Lecturer Competition (2009). He received best a paper award at the IEEE FPT 2010 conference (co-authored with S. Birk and G. Steffan), a best paper award at the IEEE FPL 2011 conference (co-authored with M. Gort) and a best paper nomination at IEEE/ACM ASP-DAC 2011 (co-authored with Q. Wang). He is an inventor on over 20 issued U.S. patents, and he has co-authored over 30 research papers in refereed international journals and symposia.
From 1997 through 2008, Jason was with Xilinx, Inc, where he worked on the research and development (R&D) of automated synthesis tools and flows for Xilinx field-programmable gate arrays (FPGAs). From 1997-2001 and for 2006, he was based at Xilinx headquarters in San Jose, CA, USA. From 2001-2005 and from 2006-2008, he was at the Xilinx Toronto Development Centre. In 2000, he received the Xilinx Ross Freeman Award for Technical Innovation: the top innovation award given by Xilinx. Prior to joining the UofT, he was a Principal Engineer and Manager at Xilinx, leading an R&D group with emphasis on improving tool run-time, FPGA speed, area and power-efficiency. From 2005-2008, he was also an Adjunct Professor of ECE at UofT, teaching a graduate course on design automation algorithms for digital circuit synthesis.
Dr. Anderson is a member of IEEE, ACM, and is a licensed Professional Engineer (P.Eng.) in the Province of Ontario.
Curriculum Vitae (PDF).
Teaching
APS 105 - Computer Fundamentals (Undergraduate) (2011, 2010, 2009, 2008)
Lecture on Sorting Algorithms
[November 2008] (slides PDF)
ECE 241 - Digital Systems (Undergraduate) (2011, 2010, 2009)
Fall
2010 Verilog Demos
Fall 2011 Syllabus (PDF)
Fall 2011 Verilog Demos
Fall 2011 Talk About Research (PDF)
Fall 2011 Syllabus (PDF)
Fall 2011 Verilog Demos
Fall 2011 Talk About Research (PDF)
ECE 1387 - CAD for Digital Circuit Synthesis and Layout (Graduate) (2005-2011)
Publications and Patents
Service in the Research Community and the University
Faculty advisor for the Leaders of Tomorrow student organization (ECE Department)
Member of
Organizing/Executive Committee:
Program chair
for the IEEE FPT 2012 conference.
Design contest chair for the IEEE FPT 2011 conference.
Technical digest editor for the ISSCC 2012 conference.
Local arrangements chair and webmaster for the IEEE FCCM 2012 conference.
Publicity co-chair for the IEEE FCCM 2011 conference.
Workshop chair for the ACM FPGA 2009 conference.
Design contest chair for the IEEE FPT 2011 conference.
Technical digest editor for the ISSCC 2012 conference.
Local arrangements chair and webmaster for the IEEE FCCM 2012 conference.
Publicity co-chair for the IEEE FCCM 2011 conference.
Workshop chair for the ACM FPGA 2009 conference.
Associate Editor:
Member of Technical Program Committee (TPC):
ACM International Symposium on
Field Programmable Gate Arrays (FPGA) (2009, 2010, 2011, 2012)
IEEE International Conference on Field Programmable Custom Computing Machines (FCCM) (2011, 2012)
IEEE International Conference on Field Programmable Logic and Applications (FPL) (2005, 2006, 2007, 2008, 2009, 2010, 2011)
IEEE International Conference on Field ProgrammableTechnology (FPT) (2010, 2011, 2012)
IEEE Internaltional Conference on Very Large Scale Integration (VLSI-SoC) (2011)
International Symposium on Applied Reconfigurable Computing (ARC) (2012)
IEEE International Symposium on Circuits and Systems (ISCAS) -- Review Committee Member (2010, 2011)
IEEE Reconfigurable Architectures Workshop (RAW) (2009,2010,2012)
IEEE International Conference on Computer Aided Design (ICCAD) (2007, 2008)
IEEE International Conference on Field Programmable Custom Computing Machines (FCCM) (2011, 2012)
IEEE International Conference on Field Programmable Logic and Applications (FPL) (2005, 2006, 2007, 2008, 2009, 2010, 2011)
IEEE International Conference on Field ProgrammableTechnology (FPT) (2010, 2011, 2012)
IEEE Internaltional Conference on Very Large Scale Integration (VLSI-SoC) (2011)
International Symposium on Applied Reconfigurable Computing (ARC) (2012)
IEEE International Symposium on Circuits and Systems (ISCAS) -- Review Committee Member (2010, 2011)
IEEE Reconfigurable Architectures Workshop (RAW) (2009,2010,2012)
IEEE International Conference on Computer Aided Design (ICCAD) (2007, 2008)
Session chair: FPL 2011, FCCM 2011, FPL 2009, ICCAD 2007.
Contact
Mail:
Prof. Jason H. Anderson
Dept. of Electrical and Computer Engineering
University of Toronto
10 King's College Road
Toronto, ON M5S 3G4 CANADA
Office: EA 314 (Engineering Annex) Click here for directions to my office.
Email: janders [at] eecg [dot] toronto [dot] edu
Tel: 416-946-7285 Fax: 416-946-8734
Administrative Assistant: Ms. Kelly Chan, EA 317, 416-978-7727 Email: kelly [at] eecg [dot] toronto [dot] edu
If you would like to book an appointment, my calendar/availability can be viewed on-line here.
