This is a graduate course that is about building real chips. It is based on team projects and you build chips that someone really needs.
The philosophy is that you really cannot learn how to build a chip except by doing it.
In the beginnings, designs were done using full-custom layout. With the introduction of HDLs, we began to use an ASIC flow to better track the industrial trends. We have always attempted to build designs that could be fabricated through the services of the Canadian Microelectronics Corporation (CMC) and we have had many succeses.
The complexity of ASIC design, mainly in terms of the time it takes to learn the tools, and the cost of fabrication is making it ever more difficult to do a complete ASIC design in this course.
In Spring 2003, we targetted FPGAs as the implementation technology using the Transmogrifier 3. This at least enabled the projects to finish by the end of the Summer of 2003!
In Spring 2004, we again used FPGAs, taking advantage of more modern system-level prototyping platforms from CMC/SOCRN.
The current state of the course is that it will focus primarily on the architectural and design aspects of large digital systems implemented on a chip. Projects will be implemented using FPGA platforms. This ensures that working demos can be implemented in a timely manner.
The nitty gritty of the backend ASIC flow is covered and experienced in ECE1388F VLSI Design Methodology.