First Local Workshop on Better Programming Models for FPGAs

Monday May 17, 2010

Galbraith Building GB202, University of Toronto

Compared to programming a general-purpose processor with software, FPGAs are difficult to program: hardware design with an HDL is challenging and requires expertise, and CAD compile times can be very long for a large design. FPGAs could enter new markets were they easier and faster to program. Many of us in the local area are working on such improved programming models, including

Schedule

Morning
10-10:45amHigher Abstractions for Programming FPGAs
Desh Singh, Altera Toronto
10:45-11:00amA Self-Accelerating Adaptive Processor
Andrew Canis, Mark Aldham, Jason Anderson, and Stephen Brown, University of Toronto
11:00-11:15amAn x86 Soft Processor
Henry Wong*, Jonathan Rose*, and Vaughn Betz**, *University of Toronto, *Altera Toronto
11:15-11:30am ARMADA: A Programming Approach for High Performance Reconfigurable Computing
Andrew House and Paul Chow, University of Toronto
11:30-11:45amA High-Performance Overlay Architecture
Greg Steffan, University of Toronto
11:45-12:00pm Dynamic Acceleration of Soft Processors using Traces
Davor Capalija and Tarek Abdelrahman, University of Toronto
12:00-12:15pm Generalized and Portable Data-Parallel Programming with Ct Technology
Michael McCool, Intel Waterloo (formerly RapidMind)

Lunch

12:15-1:15pmProvided

Afternoon

1:15-1:30pmDART: An FPGA Overlay Architecture for NoC Simulation
Danyao Wang, Natalie Enright Jerger, and Greg Steffan, University of Toronto
1:30-1:45pmExtending Software Programming Models into the Heterogeneous World
Vincent Mirian, Manuel Saldana, Arun Patel, Chris Madill, Paul Chow, University of Toronto
1:45-2:00pmGeneration of deterministic MCU/FPGA hybrid systems from UML activities
Ruediger Willenberg (now at University of Toronto), Zamira Daw, Christian Englert, Marcus Vetter University of Applied Sciences Mannheim
2:00-2:15pmSnap-Together Overlays for FPGAs
Jonathan Rose, University of Toronto
2:15-2:30pmA Single Issue Out-of-Order Soft Processor
Kaveh Aasaari and Andreas Moshovos, University of Toronto
2:30-2:45pm NetTM: Faster and Easier Synchronization for Soft Multicores
Martin Labrecque and Greg Steffan University of Toronto

Break

2:45-3:00pmbreak

WACI Session

3:00pm-3:25pmFPGAs and Manycores on a Collision-Course?
Greg Steffan, University of Toronto
3:25pm-3:50pmA Vertical Attack Plan for FPGA
Jianwen Zhu, University of Toronto

Created by Greg Steffan