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Read the README file for the latest version of VPR and T-VPack (Version 4.30).
Unix-friendly format: gzipped tarfile. Download the latest version of VPR and T-VPack (Version 4.30). This version of VPR and T-VPack (the latest version of VPack) includes timing-driven placement and timing-driven packing (clustering). Kudos to Alexander (Sandy) Marquardt for making these enhancements to VPR. This is the first version of T-VPack / VPR where the whole CAD flow is been timing-driven, from clustering to routing.
Windows-friendly format: .zip file The exact same VPR and T-VPack Version 4.30 files -- just in a different archive format.
Uncompressed format: .tar file The exact same VPR and T-VPack Version 4.30 files -- just in a different archive format. This format will take longer to download, but may be helpful if .gz files confuse your browser.
Download the placements produced by VPR for the twenty large circuits above.
Download the technology-mapped .blif format netlists of the twenty large MCNC circuits used in most of our research (including the FPGA challenge). These circuits have been mapped to 4-LUTs and flip flops. If all you want are the circuits you need to compare your placement and routing results to ours for the placement and routing challenge, you're probably better off using the .net format netlists above. If you want to investigate different logic blocks, on the other hand, these .blif format netlists are useful, since they can be packed into different logic blocks. The .net format netlists above already have the LUTs and flip flops packed together into BLEs.
Download the README file for nettovqm. For information on how to proceed in interfacing your CAD tool to Quartus once you have a .vqm netlist, get the Quartus University Interface Program (QUIP) documentation from Altera.