J.H. Anderson, "A PUF design for secure FPGA-based embedded systems," IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 1-6, Taipei, Taiwan, 2010.


The concept of having an integrated circuit (IC) generate its own unique digital signature has broad application in areas such as embedded systems security, and IP/IC counterpiracy. Physically unclonable functions (PUFs) are circuits that compute a unique signature for a given IC based on the process variations inherent in the IC manufacturing process. This paper presents the first PUF design specifically targeted for fieldprogrammable gate arrays (FPGAs). Our novel design makes use of the underlying FPGA architecture, and unlike prior published PUFs, the proposed PUF can be naturally embedded into a design’s HDL, consuming very little area, and does not require the use of “hard macros” with fixed routing. Measured results on the Xilinx Virtex-5 65 nm FPGA demonstrate PUF signatures to be both unique and reliable under temperature variation.

Paper (PDF)


VHDL for single PUF bit  (PUF.vhd)
VHDL for 128-bit PUF (TOP.vhd)
Constraints file for use with Xilinx Virtex-5 university program board (XUP) containing the LX110T device  (TOP.ucf)