3.0 Preparation

1. Determine the sequence of control signals and data inputs that you would need to be able to add two 3-bit numbers using the circuit of Figure 1. You will need to know this in order to properly simulate the circuit that you will be designing. The sequence is essentially a timing diagram (giving the sequence of the input values X₂X₁X₀, Reset and clock) such as you would create using the waveform editor of maxplus2 to test the circuit.

2. Design, using VHDL, a 3-bit ripple-carry adder. You should design the adder as a basic logic function - do not use the built-in addition capability of VHDL. Simulate the adder using maxplus2 timing simulation to be sure that it works. Note that a 3-bit adder has two 3-bit inputs and one four-bit output. For use in the parts below, convert your adder into a symbol that can be imported into the graphic editor.

3. Using the adder, two 3-bit D-type registers with reset, and your seven-segment decoder circuit from Lab 3, build the circuit of Figure 1 using the graphic editor. Simulate your circuit to ensure that it works.

4. Design and simulate the same circuit using VHDL only (i.e. don't use the graphic editor). You will need to read the VHDL reference manual closely in order to do this.