2.0 Background

In class we have covered the basic circuit for RS latches, D latches, clocked D latches and master-slave edge triggered D flip-flops, so you should review your notes on these.

A shift register is typically used to send and receive data, one bit at a time, under the control of a clock signal. Figure 1 below illustrates a 4-bit shift register built out of positive-edge triggered D-type flip flops. On each positive clock edge, the value of the signal D_i is copied onto the value of Q_i. Thus it takes four clock cycles for the original value of D_in to appear as D_out. The entire contents of the shift register can be initialized by resetting each flip-flop with a reset signal.