ECE 241 F – Digital Systems
Fall 2003
J. Rose, B. Wang
Basic Information
Section |
1 |
2 |
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Instructor |
Jonathan
Rose |
Belinda
Wang |
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Office |
Eng Annex
311 |
Galbraith
204D |
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Phone |
(416)
978-6992 |
(416)
978-5543 |
||
Course
Website |
http://courses.ece.toronto.edu/ece241h1f/ |
|||
Email |
jayar@eecg.toronto.edu |
belinda@eecg.toronto.edu |
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Office
Hours |
Arrange
in class or by email |
M 11-12,
W 2-3 TH 2-3 |
||
Lecture
Rooms/Times |
T 10-11 |
GB 119 |
M 2-3 |
BA 1170 |
W 10-11 |
GB 119 |
W 11-12 |
GB 221 |
|
F 2-3 |
GB 119 |
TH 11-12 |
RS 211 |
Labs |
10% |
Project |
10% |
Midterm |
25% |
Exam |
55% |
Wednesday
October 15th, 2003, 6-8pm, Rooms SF 3201 and 3202
Type D –
examiner specified aids only, no calculators.
Title: Fundamentals of Digital Logic with Verilog
Design
Authors: Stephen Brown and Zvonko Vranesic
Publisher: McGraw-Hill,
ISBN: 0-07-282315-1
Windows NT,
2000 or XP [not Windows 98], 400Mhz Processor or above,
256Mbytes main memory. If you do not have
this class of computer, you will be able to use the University’s machines
instead. See CAD software handout.