Vector Microprocessors: Architectural and Compilation Issues

Advances in VLSI technology will soon be able to provide one billion transistors on a single chip. For this research, we are investigating the challenges of using this unprecedented number of transistors to implement vector architectures on a single chip. One reason for considering vector architectures is that they offer the exciting possibility for architects to target the emerging applications area of multimedia.

Recent developments in general-purpose microprocessors have augmented state-of-the-art superscalar hardware with vector capabilities with the goal of targetting multimedia applications. These industrial developments suggest that they are cost-effective implementations for such applications.

Motivated by these industrial developments, we are exploring not only traditional vector configurations but also combined superscalar vector configurations. Our investigation encompasses compilation algorithms for vectorization, performance and cost analysis of processor design, and exploring new architectures for vector processors and memory systems.

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Last Updated: 17 Nov 1998
Corinna G. Lee (