ECE241F -
Digital Systems - Lab Schedule and Information
Fall 2003 J.
Rose, B. Wang
The real
learning in this course goes on in the laboratory where you design, build and
debug real circuits. There are seven labs of three hours each (you have one
3-hour lab every week) plus one three-week (9 hour) project at the end of the
term. You will work in groups of two.
There are
two parts to the lab experience: preparation, which you must do outside of the
lab hours, and the actual implementation of circuits in the lab.
Each lab
usually requires you to do significant amount of preparation work, and is where
you must do much of the work to understand the concepts. Preparation must be
complete before the lab begins. Preparation will usually require design using
the CAD software supplied. Each partner in the group of 2 must submit a
separate preparation. While it is acceptable to discuss your prepartion with
your partner, your work may not be copied from your partner. You will be required to explain your preparation. Please be aware that severe penalties will
be imposed for copying of labs, as evidenced by an inability to explain the
work given as preparation. It will be graded by the TAs at the beginning
of the lab, on the following basis:
Judgement of TA |
Grade |
|
Unable
to explain any part of preparation |
0 |
|
Some
merit to work |
1 |
|
Made a
legitimate attempt |
2 |
|
Reasonable
job, may be some missing things |
3-4 |
|
Correct
and Done well, demonstrated clear knowledge of subject. |
5 |
In each
lab you will have to typically build a working circuit. Once this is done, for
each such circuit, show it to your TA for grading, out of 3:
Judgement of TA |
Grade
|
|
Did not
attend or try |
0 |
|
Tried,
but failed to get much working |
1 |
|
Most,
but not all working |
2 |
|
Everything
worked |
3 |
Note:
Although the lab portion of the course is worth only 10%, both the midterm and
the final exam will contain questions directly related to skills learned in the
lab.
Each
digital workstation has a number. Please use the same station each week. If a
piece of equipment is not working, please tell a TA to tag the board with the
problem and notify someone to have it repaired. Otherwise it will be broken the
next time you need to use it!
Section
|
Day |
Time |
Location(s) |
|
1 |
Monday |
3-6pm |
BA 3145
& 3155 |
|
2 |
Tuesday |
3-6pm |
BA 3145
& 3155 |
|
Monday/Tuesday |
Lab |
|
Sept 15/16 |
#1 Combinational
Logic, TTL and Logic Analyzer Pin-Out Diagrams
for TTL Chips and Digital Board Go to the lab in Bahen
3145 on this day – you will be assigned a specific permanent lab room from
there. |
|
Sept 22/23 |
|
|
Sept 29/30 |
|
|
October 6/7 |
|
|
October 13/14 |
No lab, Midterm! |
|
October 20/21 |
|
|
October 27/28 |
|
|
November 3/4 |
|
|
November 10/11 |
|
|
November 17/18 |
|
|
November 24/25 |
|
|
December 3 |
Project Reports Due – GB 204D |