Lab and Project Schedule – Click on Link to go to Lab

Monday/Tuesday	Lab
Sept 15/16	#1 Combinational Logic, TTL and Logic Analyzer. Pin-Out Diagrams for TTL Chips and Digital Board
Sept 22/23	#2 Altera Quartus II Tutorial and CPLDS
Sept 29/30	#3 Seven Segment Decoder
October 6/7	#4 Sequential Logic
October 13/14	No lab, Midterm!
October 20/21	#5 Adders and Registers
October 27/28	#6 Small Finite State Machines – Sequence Recognizers
November 3/4	#7 Big Finite State Machines – Controlling small Computer
November 10/11	Project 1
November 17/18	Project 2
November 24/25	Project 3