Credits

The Supersmall Soft Processor Project was the brainchild of Prof. Jonathan Rose of the department of Electrical and Computer Engineering at the University of Toronto, and he has overseen its development under successive generations of summer students. A brief timeline is as follows:

Year Name FPGA Milestones
2006 Michael Ritchie Stratix I
Stratix II
  • Bit-serial ALU
  • Instruction decoding
  • Shifter
  • Initial state machine and datapath
2007 Jonathan Scobbie
Sam Vafaee 		Stratix II
  • nPC branch delay register
  • Serial register file
  • Optimized state machine
2009 James Robinson Stratix III
  • Exceptions support
  • Serial load/store interface
  • Current documentation