University of Toronto Computer Engineering Research Group (EECG)

Current and Former Students

Current Students
Name Degree Thesis Topic
Keerthi Nelaturu PhD in progress
Yuxi Cai MASc in progress
Nicholas Fung MASc in progress
Armita Jalooli MASc in progress
James Meijers MASc in progress
.
Former Students
Name Degree Thesis Topic
Ryan Berryhill PhD (2020)
Kazi Arif MEng (2019)
Neil Veira MASc (2019) Novel Approaches to Register Transfer Level Debugging and Embedding Representations for Knowledge Base Completion
Zissis Poulos PhD (2018) Scalable Inference in Hardware Verification and Social Graph Reasoning
John Adler MASc (2017) Novel Approaches to Automated Digital Design Debugging in a Modern Development Cycle
Djordje Maksimovic MASc (2015) Novel Directions in Debug Automation for Sequential Digital Designs in a Modern Verification Environment
Brian Keng PhD (2013) Advances in Debug Automation for a Modern Verification Environment
Dr. Dipanjan Sengupta post-doctoral (2010-2013)
Bao Le PhD (2012) SAT-based Automated Design Debugging: Improvements and Application to Low-power Design
Hratch Mangassarian PhD (2008, 2012) PB-SAT and QBF Solvers in CAD for VLSI (MASc), QBF Solvers (PhD)
Terry (Yu-Shen) Yang PhD (2004, 2010) Extraction Error Modelling and Automated Debugging in High Performance Custom Designs (MASc). Algorithmic resynthesis (PhD)
Yibin Chen MASc (2009) CAD Verification
Sean Safarpour PhD (2005, 2009) Managing Don't Cares in Boolean Satisfiability (MASc), Formal Techniques in Design Debugging (PhD)
Elham Safi PhD (2009) Architecture-level Power Modeling
Jackey Wong MEng (2008) Automated Test Bench Generation
Moayad Fahim Ali MASc (2005) Satisfiability-based Debugging of Sequential and Hierarchical Designs
Robert Chang MEng (2004) Functional Fault Equivalence and Automated Diagnostic Test Generation Using Convential ATPG
Alexander Smith MASc (2004) Diagnosis of Combinational Logic Curcuits Using Boolean Satisfiability 
Karen Ha MEng (2003) Algorithms For Optimizing the Test Generation Process of VLSI Designs
Joanne Lee MEng (2003) Controllability Don't Care in Boolean Satisfiability for EDA
Brandon Liu MASc (2003) Incremental Diagnosis in Digital VLSI Circuits
Mandana Amiri MEng (2001) ATPG Based Diagnosis and Optmization Techniques
Ivor Ting MEng (2000) Design Optimization Using ATPG-based Reqiring Techniques

  University of Toronto Computer Engineering Research Group (EECG)