Rami Beidas received his B.Sc. degree in Computer Engineering from
University of Southampton
in 2000, and the M.Sc. degree from
University of Toronto
in 2004. In 2001/02 he was an ASIC design engineer in Chrysalis-ITS.
Currently he is pursuing his Ph.D. degree in Computer Engineering under
the supervision of Jianwen Zhu.
His research interests are in the general field of computer-aided design
with emphasis on high-level synthesis and system-on-chip architecture
and design methodologies.
[1] [2] [3]
Address
University of Toronto
EA306, 10 King's College Rd
Toronto, Ontario, Canada M5S 3G4
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Referenced Publications
Rami Beidas
and
Jianwen Zhu,
``Scalable inter-procedural register allocation for high level
synthesis,''
in Proceeding of Asia and South Pacific
Design Automation Conference
(ASPDAC), Shanghai,
China, January 2005.
Rami Beidas
and
Jianwen Zhu,
``A queuing theoretic performance model for context-flow
system-on-chip platform,''
in Workshop on Embedded Systems for Real-Time Multimedia,
Stockholm, Sweden, September 2004.
Rami Beidas
and
Jianwen Zhu,
``Performance efficiency of context-flow system-on-chip
platform,''
in Proceedings of the International
Conference on Computer Aided Design
(ICCAD),
San Jose, California, November 2003.
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