Advanced Computer Architecture, Fall 2005
ECE, Univ. of Toronto

Instructor: Andreas Moshovos, EA311 EA310, x6-7373,
Lectures: Tuesday 1-3 & Thursday 3-6


Lecture Notes/Topics

1, What is this Course About – Course Outline - Expectations
2, Metrics/Benchmarks
3, Instruction Sets
How to build a simple processor that works correctly (background from Computer Organization):
Single cycle implementation
Multicyle Implementation: The Datapath
Multicycle Implementation: The Control

4, Pipelining
Reading: Implementing Precise Interrupts, Smith & Plezkun
5, Superscalar and Out-of-Order Execution
Readings: The MIPS R10000 processor
Pentium Pro
*** Alpha 21264 *** NEW
Programming tips for modern processors, an example: Writing programs for the Alpha architecture

6, Control Flow Prediction NEW
Readings: Alternative Implementations of two-level adaptive branch predictors


Please be prepared to participate in the discussion the papers that are presented by reading the paper in advance.

Tuesday, Oct. 18th: The Pentium 4 architecture / The Cray-1 Supercomputer

Tuesday, Oct. 25th: Complexity Effective Processors / Simplified Schedulers (Cyclone)

Thursday, Nov. 3rd: A Dynamic Multithreading Processor (Adam) / Select-Free Instruction Scheduling Logic (Nazar) (room may change please check the website the day before)

Thursday, Nov. 10th: Speculative Versioning Cache (Patrick)

Tuesday, Nov. 29th: DIVA (Elham) / Razor (Mark)

Thursday, Dec. 8th: Smarts + TurboSmarts / AC/DC Prefetcher / Architecture of modern GPUs



     #1 Getting to know Simplescalar's sim-safe/ Studying Program Behavior / Verifying Results

Note that the assignment assumes an earlier version of simplescalar

Support files (use “bunzip2 –c file | tar xvf - ” to uncompress/untar files ending in

0. Download and install cygwin from – Make sure to include the development tools

1.      Simplescalar “MIPS” gcc port (9.5M)

a.       Install with: “bunzip2 –c | tar xvf – “

b.      Include /usr/local/bin in your path

c.       Compile programs using “ss-gcc

2.      Simplescalar Report: Describes Simplescalar (103K)

Tutorials available at :

3.      MIPS Instruction Set Reference, (653K)

a.      Note that Simplescalar implements a MIPS-like instruction set that uses 64-bits per instruction (see previous report)

4.      Simplescalar source code (slightly modified – 350K)

Please note that the assignment assumes a slightly different version of simplescalar. You are responsible for figuring out the minor differences and adapt your code accordingly.

5.      Other files need to complete the assignment. (1.1M)

#2 Limits of instruction level parallelism – How is Performance affected by various modern processor attributes NEW

Please use from the first assignment. Where needed report the summary of your results along with comments explaining why you think the results are as they are.

#3 Advanced topics.

Don’t forget question “0. What is the difference between ‘baseline’ and ‘ideal’ in Select-Free Instruction Scheduling Logic”?



Information and deliverables

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