I am an Assistant Professor in the Edward S. Rogers Sr. Department of Electrical and Computer Engineering at the University of Toronto. I work on computer architecture and computer systems. My goal is to enable software engineers to easily harness the full potential of parallel systems with many thousands of cores. My current research focuses on (i) new programming models and compilers that easily express challenging types of parallelism and (ii) new large-scale multicore and accelerator architectures that extract the parallelism.

Before joining the University of Toronto, I was a Research Scientist in the Systems group at Facebook AI Research. I earned a PhD from the Massachusetts Institute of Technology, where I worked with Daniel Sanchez in the Computer Science and Artificial Intelligence Laboratory. Previously, I was a software engineer at AeroFS, a Y combinator startup, working on distributed file sharing. I earned an MASc while working with Greg Steffan and a BASc in Engineering Science from the University of Toronto.

Teaching

Winter 2021 ECE1755 Parallel Computer Architecture and Programming
Fall 2020 ECE552 Computer Architecture

Publications

CPR: Understanding and improving failure tolerant training for deep learning recommendation with partial recovery. Kiwan Maeng, Shivam Bharuka, Isabel Gao, Mark C. Jeffrey, Vikram Saraph, Bor-Yiing Su, Caroline Trippel, Jiyan Yang, Mike Rabbat, Brandon Lucia, and Carole-Jean Wu. In Proc. of the 4th Conference on Machine Learning and Systems (MLSys). (To Appear). [text] MLSys
2021
T4: Compiling sequential code for effective speculative parallelization in hardware. Victor A. Ying, Mark C. Jeffrey, and Daniel Sanchez. In Proc. of the 47th ACM/IEEE International Symposium on Computer Architecture (ISCA-47). June 2020. [text] [doi] [slides] [talk] [code] ISCA
2020
A hardware and software architecture for pervasive parallelism. Mark C. Jeffrey. PhD Thesis, Massachusetts Institute of Technology. 2019. [text] PhD
Thesis
Harmonizing speculative and non-speculative execution in architectures for ordered parallelism. Mark C. Jeffrey, Victor A. Ying, Suvinay Subramanian, Hyun Ryong Lee, Joel Emer, and Daniel Sanchez. In Proc. of the 51st IEEE/ACM international symposium on Microarchitecture (MICRO-51). October 2018. [text] [doi] [slides] [lightning] MICRO
2018
SAM: optimizing multithreaded cores for speculative parallelism. Maleen Abeydeera, Suvinay Subramanian, Mark C. Jeffrey, Joel Emer, and Daniel Sanchez. In Proc. of the 26th international conference on Parallel Architectures and Compilation Techniques (PACT-26). September 2017. [text] [doi] [slides] PACT
2017
Fractal: an execution model for fine-grain nested speculative parallelism. Suvinay Subramanian, Mark C. Jeffrey, Maleen Abeydeera, Hyun Ryong Lee, Victor A. Ying, Joel Emer, and Daniel Sanchez. In Proc. of the 44th ACM/IEEE International Symposium on Computer Architecture (ISCA-44). June 2017. [text] [doi] [slides] [press: MIT News] ISCA
2017
Data-centric execution of speculative parallel programs. Mark C. Jeffrey, Suvinay Subramanian, Maleen Abeydeera, Joel Emer, and Daniel Sanchez. In Proc. of the 49th IEEE/ACM international symposium on Microarchitecture (MICRO-49). October 2016. (Honorable mention for IEEE Micro's Top Picks) [text] [doi] [slides] MICRO
2016
Unlocking ordered parallelism with the Swarm architecture. Mark C. Jeffrey, Suvinay Subramanian, Cong Yan, Joel Emer, and Daniel Sanchez. IEEE Micro's Top Picks from the Computer Architecture Conferences, 36(3). May/June 2016. [text] [doi] [press: MIT News, EEJournal, TOP500, HPCwire] IEEE
Micro
2016
A scalable architecture for ordered parallelism. Mark C. Jeffrey, Suvinay Subramanian, Cong Yan, Joel Emer, and Daniel Sanchez. In Proc. of the 48th IEEE/ACM international symposium on Microarchitecture (MICRO-48). December 2015. (Selected for IEEE Micro's Top Picks issue of "most significant papers in computer architecture based on novelty and long-term impact") [text] [doi] [slides] MICRO
2015
Understanding and improving Bloom filter configuration for lazy address-set disambiguation. Mark C. Jeffrey. MASc Thesis, University of Toronto. 2011. [text] [slides] [code] MASc
Thesis
Application-specific signatures for transactional memory in soft processors. Martin Labrecque, Mark C. Jeffrey, and J. Gregory Steffan. ACM Transactions on Reconfigurable Technology and Systems, 4(3). August 2011. [doi] ACM
TRETS
2011
Understanding Bloom filter intersection for lazy address-set disambiguation. Mark C. Jeffrey and J. Gregory Steffan. In Proc. of the 23rd ACM Symposium on Parallelism in Algorithms and Architectures (SPAA). June 2011. [text] [doi] [slides] [code] SPAA
2011
Application-specific signatures for transactional memory in soft processors. Martin Labrecque, Mark C. Jeffrey, and J. Gregory Steffan. In Proc. of the 6th international symposium on Applied Reconfigurable Computing (ARC). March 2010. (Best paper award) [doi] ARC
2010