ECE243 - “SPRING” 2007

Andreas Moshovos (*)


** Warning **


There may be errors or omissions in the notes that follow and of course I’m responsible for them. If you do spot an error please let me know. There no intentional errors in the notes. Irrespective of any typos and other errors, you are responsible for the “correct answer” to questions and problems.


How these relate to the book: In our lectures we will use a slightly different order than the book and also emphasize some topics more than others. Accordingly, there may not always be a direct correspondence between a lecture and a book section. Where possible I will be noting the book sections each lecture corresponds to.


If you want to experiment with 68k programs that do not use I/O devices you can try Easy68K, a 68k simulator that runs under windows. This is a simulator and not actual hardware hence it may not faithfully simulate 68k’s behavior. So use this with caution and as an aid. You will not be able to complete most of the labs on this simulator because they involve I/O devices.


For your reference here’s the 68K Programmer’s Manual. This is a large document that specifies every minute detail that a programmer needs to know to program the 68k. We will of course cover only a subset of this information during the lectures.

THEMATIC SECTION #1: Understanding what Computers do at the low level:

What you need to know to successfully program a computer


1. Introduction, course goals, digital systems and why they are useful.

(book chapter 1 except 1.6 & 1.7)

2. Using Binary Quantities to Represent Other Things.

(book 2.1)

**** Practice questions Answers

Corrected number ranges for 2’s complement.

* More information about floating point numbers – we will not cover or discuss any of this material.

3. Behavioral Model of Memory.

(book 2.2 – 2.3)

We have not yet covered the physical interface section. We’ll do that much later in the course.

**** Practice questions

4. Introduction to the 68k programming model.

(book 3.8 and some of 3.9 and 2.4)

5. Assembly representation of 68k instructions and data. We’ll go over lecture #5 later in the course.

      (book 2.6, 3.10 and Ultragizmo manual 2.1)

6. Simple Control Flow (non straight-line sequencing).

      (book 2.4.5, 2.4.6, 3.11.1, 3.11.2)

      **** Practice questions

7. For loops, arrays and do-while loops.

      (not as-is in the book related sections 2.11 and 3.15)

      **** Practice questions

8. Implementing the C switch structure.

      (not as-is) see above

9. Subroutines – Requirements – Calling and Returning

10. Subroutines – Passing Arguments and Returning Values – Complete Example (Ackerman Function)

10.1 Step-by-Step Example: What happens when Ackerman(1,1) is called.

       This is provided as an aid, we will not go through this example during the lectures.

11 Subroutines – The Frame Pointer – General Discussion
12 Subroutine Examples: (1) Searching through a Sorted Binary Tree, (2) Detecting whether a string is a palindrome

      (book 2.8, 2.9 and 3.13)

13. Introduction to Input/Output Devices: The Parallel Port Interface

      13.1 Why we need latches and the control signals

14. The Universal Asynchronous Receiver Transmitter AKA UART: A Serial Communication Device – Introduction to Polling

15. Introduction to Interrupts – Concept – A first example using the UART on the Ultragizmo board

16. Interrupts continued – Using interrupts to emulate non-existent instructions

16.1 Binary/Bit manipulation instructions.

      (book 2.10.1, 2.10.2 and 3.14)

17. Instruction Representation, Stored Program, Straight-Line instruction sequencing.

      (book 2.4.4, 3.9  and some of 3.11)

18. Characterization of Instruction Sets


THEMATIC SECTION #2: Building Processors:

What you need to know to build a computer


19. Single Cycle Implementation of a Simple CPU/Instruction Set

·           Datapath drawing

·           Modifying the ADD instruction

20.1 Multiple Cycle Implementation of a Simple CPU/Instruction Set: The Datapath

      Datapath Drawing

20.2 Multiple Cycle Implementation of a Simple CPU/Instruction Set: The Control

20.3 Extending/Changing the Multicycle Datapath

      Changing LOAD r1 (r2) into LOAD r1 (r2)+

      * Practice questions

20.4 Microprogrammed Control

Please refer to the book for a complete treatment of this subject.

20.5    Interfacing with slower memories

20.6    Bus-Based Multi-cycle implementation

Please refer to the book for a complete treatment of this subject.

These notes are meant to be a short, high-level introduction.

20.7    Pipelining Concept

21.Synthesizing larger memories

22. Cache indexing, Storage Requirements and hit/miss determination examples

22.1 Reasoning about caches and performance: examples








19.2 Microprogramming (there will be short notes posted but please do read the book)

20.  Pipelining 

22. Cache Memory
      Please read sections 5.5 and 5.6 from the book.

22.1 Reasoning about caches and performance: examples



(*) Permission is given to reproduce these notes provided that a notice of their origin is clearly given. All rights reserved just in case :)